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Dobrica Pavlinušić's random unstructured stuff
innbox v80


position of plastic clips to unclip after removing screws


top of board


bottom of board


software version

Hardware version: 1.0
Active image: 2
Firmware image 1: 1.0.839
Firmware image 2: 1.1.966
Checksum of image 1: 34e4b3948d00a869d961283510a7eb08
Checksum of image 2: a6e08754c908c237d1539cb143611697
Firmware bootloader: 1.9
CRC of bootloader: a6e08754c908c237d1539cb143611697


4 pins, pin 1 marked with triangle

1: TX
2: RX
3: GND
4: 3V3 (?)

serial output


DDR3 init.
DRAMC init done.
Calculate size.
DRAM size=128MB
Set new TRFC.

7512DRAMC V1.2.2 (0)

EN751221 at Fri Apr 16 11:48:25 CST 2021 version 1.9 free bootbase

Memory size 128MB

Set SPI Clock to 50 Mhz
spi_nand_probe: mfr_id=0xc8, dev_id=0x21
Using Flash ECC.
Detected SPI NAND Flash : _SPI_NAND_DEVICE_ID_F50L1G, Flash Size=0x8000000
bmt pool size: 81
BMT & BBT Init Success

>>>> [get_env_info] hw_id:InnboxV80_PW2
>>>> [set_gpio_define] g_hw_id:InnboxV80_PW2
Reset button GPIO is: 0
Press any key in 3 secs to enter boot command mode.

Invalid Power GPIO, just return and don't turn on Power LED


>>>> CTC: boot_flag_addr: 53e0fff; flag: 1 version_addr:53e1000 version:1.9<FF><FF><FF><FF>

==> boot flag = 1
Decompress to 80002000 free_mem_ptr=80E00000 free_mem_ptr_end=807B0000
from slave
Uncompressing [LZMA] ...  done.
Initializing cgroup subsys cpuset
Initializing cgroup subsys cpu
Initializing cgroup subsys cpuacct
Linux version 3.18.21 (iskratel@2d7d74f016e9) (gcc version 4.6.3 (Buildroot 2015.08.1) ) #3 SMP Fri Apr 16 11:32:58 CST 2021
ISPRAM0: PA=00770000,Size=00010000,enabled
Config7: 0x80080500
EcoNet EN751221 SOC prom init
bootconsole [early0] enabled
CPU0 revision is: 00019558 (MIPS 34Kc)
Determined physical RAM map:
 memory: 077fe000 @ 00002000 (usable)
Wasting 64 bytes for tracking 2 unused pages
Zone ranges:
  Normal   [mem 0x00002000-0x077fffff]
Movable zone start for each node
Early memory node ranges
  node   0: [mem 0x00002000-0x077fffff]
Initmem setup node 0 [mem 0x00002000-0x077fffff]
Detected 1 available secondary CPU(s)
Primary instruction cache 64kB, VIPT, 4-way, linesize 32 bytes.
Primary data cache 32kB, 4-way, VIPT, cache aliases, linesize 32 bytes
PERCPU: Embedded 9 pages/cpu @810f3000 s5664 r8192 d23008 u36864
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 30478
Kernel command line:  es=1
PID hash table entries: 512 (order: -1, 2048 bytes)
Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
Writing ErrCtl register=0002e01a
Readback ErrCtl register=0002e01a
nmi base is 81124200
Memory: 110280K/122872K available (7640K kernel code, 1290K rwdata, 1624K rodata, 304K init, 551K bss, 12592K reserved)
SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
Hierarchical RCU implementation.

tc3162_time_init: Init bus timeout and watchdog
plat_set_irq_affinity: cpu 0
plat_set_irq_affinity: cpu 0 vpe_id 0
plat_set_irq_affinity: irq_vpe0 1 irq_vpe1 0, irq = 10
plat_set_irq_affinity: irq num 10
plat_set_irq_affinity: cpu 0
plat_set_irq_affinity: cpu 0 vpe_id 0
plat_set_irq_affinity: irq_vpe0 1 irq_vpe1 0, irq = 33
plat_set_irq_affinity: irq num 33
CPU frequency 900.00 MHz
plat_time_init: Entered, mips_timer_ack ptr is [80006dd4]
 Using 200.000 MHz high precision timer.
r4k_clockevent_init: setup_irq OK, irq is [31]
console [ttyS0] enabled
console [ttyS0] enabled
bootconsole [early0] disabled
bootconsole [early0] disabled
Calibrating delay loop... 597.60 BogoMIPS (lpj=2988032)
pid_max: default: 32768 minimum: 301

boot loader

bldr> ?

?                                   Print out help messages.
help                                Print out help messages.
go                                  Booting the linux kernel.
decomp                              Decompress kernel image to ram.
memrl <addr>                        Read a word from addr.
memwl <addr> <value>                Write a word to addr.
dump <addr> <len>                   Dump memory content.
jump <addr>                         Jump to addr.
flash <dst> <src> <len> <oob>       Write to flash from src to dst(oob: write nand oob if 1).
imginfo                             Show images info.
spinand_rwtest                      Flash Test
bdstore <flash dst> <bin src>       Do backdoor config store
bdshow                              Show backdoor config
bdswitch[1|0]                       Enable or disable backdoor function
ddrcalswitch[1|0]                   Enable or disable ddr calibration funciton
drambistswitch[0|1|2]               disable or enable, and quick or normal test
xmdm <addr> <len>                   Xmodem receive to addr.
miir <phyaddr> <reg>                Read ethernet phy reg.
miiw <phyaddr> <reg> <value>        Write ethernet phy reg.
cpufreq <freq num> / <m> <n>        Set CPU Freq <156~450>(freq has to be multiple of 6)
ipaddr <ip addr>                    Change modem's IP.
httpd                               Start Web Server
bldr> bdshow
back door config is not support NAND Flash


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