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in Dobrica Pavlinušić's random unstructured stuff
FPGA
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X300 dongle



X300 dongle

JTAG

I took picture of both sides of board, corrected it using perspective tool in gimp and added layers with VCC (5V and 3.3V) and GND (checked with unimer continuity test).

x300_dongle-jtag.jpg

JTAG pinout doesn't match silkscreen designation of pin 1 (it's rotated). It also doesn't have VCC pin connected, so you need to supply 5V power via other means (I used PS/2 connector).

Bus Blaster jtag try:

jtag> cable jtagkey vid=0x0403 pid=0x6010 interface=0
Connected to libftd2xx driver.
jtag> detect
IR length: 10
Chain length: 1
Device Id: 00010111000001100100000011011101 (0x170640DD)
  Manufacturer: Altera (0x0DD)
  Part(0):      EPM3064A (0x7064)
  Stepping:     1
  Filename:     /usr/local/share/urjtag/altera/epm3064a/epm3064a

jtag> print chain
 No. Manufacturer              Part                 Stepping Instruction          Register
-------------------------------------------------------------------------------------------------------------------
*  0 Altera                    EPM3064A             1        BYPASS               BYPASS

# IMPORTANT: load signal aliases for this package
jtag> include /usr/local/share/urjtag/altera/epm3064a/t44

# get values of all pins

jtag> instruction SAMPLE/PRELOAD
jtag> shift ir
jtag> shift dr
jtag> dr
010010111010111010010111010010010010111111111010111010
111010010010010111010010010010010010010010010010010010
010010010010010010010010010010010010010010010010010010
010010010010010111010111010010
 (0x0000000000000000000000000000000024924924924975D2)

jtag> print chain
 No. Manufacturer              Part                 Stepping Instruction          Register
-------------------------------------------------------------------------------------------------------------------
*  0 Altera                    EPM3064A             1        SAMPLE/PRELOAD       BSR

jtag> get signal IO2
IO2 = 1
jtag> get signal IO3
IO3 = 1
jtag> get signal IO43
IO43 = 1
jtag> get signal IO44
IO44 = 1

# toggle single pin

jtag> instruction EXTEST
jtag> shift ir

jtag> print chain
 No. Manufacturer              Part                 Stepping Instruction          Register
-------------------------------------------------------------------------------------------------------------------
*  0 Altera                    EPM3064A             1        EXTEST               BSR

jtag> set signal IO10 out 0
jtag> shift dr

# re-read values of all pins

jtag> instruction SAMPLE/PRELOAD
jtag> shift ir
jtag> shift dr
jtag> get signal IO10
IO10 = 0


SVF programming

jtag> svf /blue-zfs/FPGA/Altera-x300/x300_dongle/output_files/dongle1.svf stop progress
detail: Parsing     20/520 (  3%)warning: unimplemented mode 'ABSENT' for TRST
detail: Parsing    520/520 (100%)detail: 
detail: Scanned device output matched expected TDO values.

VHDL to toggle pins

Toggle pins on all four sides of CPLD and create additional two images with all one and all zero for easy test where pin is

dongle1.vhd

Then I connected logic analyzer on pins and tried different svf files (all-0, all-1, left, bottom, right, top) to locate which pin change depending on image loaded. To isolate pins I used EXTEST and toggled pins.

RJ45

rj45-pins.jpg Pro050-rj45.png

pin pull cable
1   GND
2 1 VGA?
3 0 IO?
4 1 VGA?
5 0 IO?
6 1 VGA?
7   IO10
8   5V

PS2

http://www.computer-engineering.org/ps2protocol/

female socket male plug
ps2-female-socket.JPG ps2-male-plug.JPG

6-pin Mini-DIN (PS/2):
1 - Data
2 - Not Implemented
3 - Ground
4 - Vcc (+5V)
5 - Clock
6 - Not Implemented



Keyboard (left, purple)

pin IO
1 (data) IO43
5 (clock) IO44

Mouse (right, green)

pin IO
1 (data) IO34
5 (clock) IO35

Audio jack

R2R D2A

all measurements are done on Hantek 2090 with 500mV/div setting which may account for some accuracy errors

channel 1

state min max
off 64.17 mV 95.54 mV
IO23 1.664 V 1.696 V
IO22 864 mv 895 mV
IO21 472 mV 503 mV
IO20 283 mV 299 mV
IO19 189 mv 221 mV

channel 2

state min max
off 3.3 50 mV
IO33 113 mV 144 mV
IO31 207 mV 254 mV
IO28 395 mV 442 mV
IO27 803 mV 850 mV
IO25 1.603 V 1.635 V
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Altera

Bunch of references for Altera FPGA



JTAG pinout

altera-jtag-pinout.jpg

Bus Pirate programming

The Bus Pirate can program CPLDs and FPGAs using XSVF format bitstreams and XSVF player firmware. Altera might not output XSVF directly, but there is a simple converter for SVF to XSVF.

Windows binaries are provided, but the source should also compile under Linux. Source is in the Bus Pirate SVN:
https://code.google.com/p/the-bus-pirate/source/browse/#svn%2Ftrunk%2Fscripts%2FXSVF

Bus Pirate FPGA and CPLD programming with XSVF:
http://dangerousprototypes.com/docs/Bus_Pirate#FPGA_and_CPLD_programming

SVF to XSVF converter:
http://dangerousprototypes.com/docs/JTAG_SVF_to_XSVF_file_converter

USB Blaster

FX2LP firmware

Quartus

Create SVF file

http://www.altera.com/support/kdb/solutions/rd07222008_677.html

To generate an SVF file in Quartus® II software, follow the steps below:

  • Open the Quartus II programmer and add a .sof / .pof file into the programmer window.
  • Select the File Menu then select Create/Update within this menu choose Create JAM, SVF, or ISC File.
  • Input a file name for your SVF file output.
  • In the File Format drop-down select Serial Vector File (SVF) as your output file type.
  • Press ok to generate your SVF file.

manual pin assigment

edit .*qsf file and add:

set_location_assignment PIN_AP30 -to qdr_q[35]

13.0sp1 start

dpavlin@klin:~$ /opt/altera/13.0sp1/quartus/bin/quartus --64bit


Altera hardware

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OV7670
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ULX2S
down-button.jpg

composite.png

dpavlin@blue:/bluez/FPGA/ULX2S/uk101$ KERNEL[16887.354856] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.1/3-1.1.3 (usb)
KERNEL[16887.358543] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.1/3-1.1.3/3-1.1.3:1.0 (usb)
UDEV  [16887.365476] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.1/3-1.1.3 (usb)
KERNEL[16888.370326] add      /module/usbserial (module)
KERNEL[16888.370344] add      /bus/usb-serial (bus)
KERNEL[16888.370378] add      /bus/usb/drivers/usbserial (drivers)
KERNEL[16888.370396] add      /bus/usb/drivers/usbserial_generic (drivers)
KERNEL[16888.370413] add      /bus/usb-serial/drivers/generic (drivers)
UDEV  [16888.370685] add      /module/usbserial (module)
UDEV  [16888.370725] add      /bus/usb-serial (bus)
UDEV  [16888.370879] add      /bus/usb/drivers/usbserial (drivers)
UDEV  [16888.370901] add      /bus/usb-serial/drivers/generic (drivers)
UDEV  [16888.370928] add      /bus/usb/drivers/usbserial_generic (drivers)
KERNEL[16888.371900] add      /module/ftdi_sio (module)
KERNEL[16888.371923] add      /bus/usb/drivers/ftdi_sio (drivers)
KERNEL[16888.371945] add      /bus/usb-serial/drivers/ftdi_sio (drivers)
UDEV  [16888.371980] add      /module/ftdi_sio (module)
UDEV  [16888.372050] add      /bus/usb-serial/drivers/ftdi_sio (drivers)
KERNEL[16888.372098] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.1/3-1.1.3/3-1.1.3:1.0/ttyUSB0 (usb-serial)
UDEV  [16888.372124] add      /bus/usb/drivers/ftdi_sio (drivers)
KERNEL[16888.372401] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.1/3-1.1.3/3-1.1.3:1.0/ttyUSB0/tty/ttyUSB0 (tty)
UDEV  [16888.372546] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.1/3-1.1.3/3-1.1.3:1.0 (usb)
UDEV  [16888.372888] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.1/3-1.1.3/3-1.1.3:1.0/ttyUSB0 (usb-serial)
UDEV  [16888.374650] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.1/3-1.1.3/3-1.1.3:1.0/ttyUSB0/tty/ttyUSB0 (tty)
KERNEL[16929.333395] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3 (usb)
KERNEL[16929.333629] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3:1.0 (usb)
UDEV  [16929.338304] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3 (usb)
UDEV  [16929.338759] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3:1.0 (usb)
KERNEL[16929.708966] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.2 (usb)
KERNEL[16929.712382] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.2/3-1.6.3.2:1.0 (usb)
KERNEL[16929.712433] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.2/3-1.6.3.2:1.0/media0 (media)
KERNEL[16929.773679] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.2/3-1.6.3.2:1.0/video4linux/video0 (video4linux)
KERNEL[16929.773733] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.2/3-1.6.3.2:1.0/input/input30 (input)
KERNEL[16929.773790] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.2/3-1.6.3.2:1.0/input/input30/event16 (input)
KERNEL[16929.773883] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.2/3-1.6.3.2:1.1 (usb)
KERNEL[16929.942458] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.3 (usb)
KERNEL[16929.943007] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.3/3-1.6.3.3:1.0 (usb)
KERNEL[16929.943064] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.3/3-1.6.3.3:1.0/video4linux/video2 (video4linux)
UDEV  [16929.949326] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.2 (usb)
UDEV  [16929.949933] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.2/3-1.6.3.2:1.1 (usb)
UDEV  [16929.949946] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.2/3-1.6.3.2:1.0 (usb)
UDEV  [16929.950176] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.3 (usb)
UDEV  [16929.950550] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.2/3-1.6.3.2:1.0/media0 (media)
UDEV  [16929.950861] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.2/3-1.6.3.2:1.0/input/input30 (input)
UDEV  [16929.951576] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.2/3-1.6.3.2:1.0/input/input30/event16 (input)
UDEV  [16929.952469] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.2/3-1.6.3.2:1.0/video4linux/video0 (video4linux)
UDEV  [16930.953075] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.3/3-1.6.3.3:1.0 (usb)
UDEV  [16930.954337] add      /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.6/3-1.6.3/3-1.6.3.3/3-1.6.3.3:1.0/video4linux/video2 (video4linux)

dpavlin@blue:/bluez/FPGA/ULX2S/uk101$ 
dpavlin@blue:/bluez/FPGA/ULX2S/uk101$ ../ujprog-x86-64 ./uk101-ulx2s8k.jed 
ULX2S JTAG programmer v 1.07 $Id: ujprog.c 1748 2014-01-09 15:07:43Z marko $
KERNEL[17115.768270] remove   /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.1/3-1.1.3/3-1.1.3:1.0/ttyUSB0/tty/ttyUSB0 (tty)
KERNEL[17115.768305] remove   /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.1/3-1.1.3/3-1.1.3:1.0/ttyUSB0 (usb-serial)
Using USB JTAG cable.
UDEV  [17115.769313] remove   /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.1/3-1.1.3/3-1.1.3:1.0/ttyUSB0/tty/ttyUSB0 (tty)
UDEV  [17115.769664] remove   /devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.1/3-1.1.3/3-1.1.3:1.0/ttyUSB0 (usb-serial)
Programming: 100%  
Completed in 5.88 seconds.
dpavlin@blue:/bluez/FPGA/ULX2S/uk101$ 
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Papilio


loader

https://github.com/GadgetFactory/Papilio-Loader/pull/6

dpavlin@blue:/blue-zfs/FPGA/Papilio$ git clone https://github.com/GadgetFactory/Papilio-Loader.git
dpavlin@blue:/blue-zfs/FPGA/Papilio$ cd Papilio-Loader/papilio-prog
dpavlin@blue:/blue-zfs/FPGA/Papilio/Papilio-Loader/papilio-prog$ git checkout -b revert-libftdi2 261d0dd02f5489c63e8227c6f916af5efacfbe7a
dpavlin@blue:/blue-zfs/FPGA/Papilio/Papilio-Loader/papilio-prog$ ./autogen.sh 
dpavlin@blue:/blue-zfs/FPGA/Papilio/Papilio-Loader/papilio-prog$ ./configure && make

# check compiled binary
dpavlin@blue:/blue-zfs/FPGA/Papilio/Papilio-Loader/papilio-prog$ ./papilio-prog -v -j
Using built-in device list
JTAG chainpos: 0 Device IDCODE = 0x24001093     Desc: XC6SLX9
USB transactions: Write 3 read 2 retries 1


ZAP IDE

compilation

dpavlin@blue:/blue-zfs/FPGA/Papilio$ git clone https://github.com/GadgetFactory/ZAP--ZPUino-Arduino-Papilio--IDE.git

dpavlin@blue:/blue-zfs/FPGA/Papilio$ cd ZAP--ZPUino-Arduino-Papilio--IDE/build/
dpavlin@blue:/blue-zfs/FPGA/Papilio/ZAP--ZPUino-Arduino-Papilio--IDE/build$ ant

dpavlin@blue:/blue-zfs/FPGA/Papilio/ZAP--ZPUino-Arduino-Papilio--IDE/build/linux$ ln -s zpu_tools_linux32.tar.bz2 zpu_tools_linux64.tar.bz2 

fix papilio-prog to use Linux binary

dpavlin@blue:/blue-zfs/FPGA/Papilio/ZAP--ZPUino-Arduino-Papilio--IDE/build/linux/work$ vi ./hardware/zpuino/zpu/platform.txt

# fix papilioprog to papilio-prog
tools.papilioprog.cmd=papilio-prog

# remove .exe from this line
tools.papilioprog.erase.pattern="{path}/bin/papilio-prog" -c


dpavlin@blue:/blue-zfs/FPGA/Papilio/ZAP--ZPUino-Arduino-Papilio--IDE/build/linux/work$ chmod 755 hardware/tools/papilio/papilio_loader/Papilio_Programmer.sh 


# copy compiled papilio-prog to correct location and fix permissions
dpavlin@blue:/blue-zfs/FPGA/Papilio/ZAP--ZPUino-Arduino-Papilio--IDE/build/linux/work$ cp ../../../../Papilio-Loader/papilio-prog/papilio-prog hardware/tools/papilio/papilio_loader/bin/
dpavlin@blue:/blue-zfs/FPGA/Papilio/ZAP--ZPUino-Arduino-Papilio--IDE/build/linux/work$ chmod 755 hardware/tools/papilio/papilio_loader/bin/papilio-prog

running IDE

Run arduino GUI:

dpavlin@blue:/blue-zfs/FPGA/Papilio/ZAP--ZPUino-Arduino-Papilio--IDE/build/linux/work$ ./arduino

Compilation works, but programming doesn't with error:

Board: Unknown board @ 96000000 Hz (0xa4041700)

so, let's rebuild zpuprogrammer

http://forum.gadgetfactory.net/index.php?/topic/1588-how-to-program-the-arduino-sketch-for-zpuino-to-the-spi-flash/page-2#entry11242

dpavlin@blue:/blue-zfs/ZPUino/ZPUino-HDL/zpu/hdl/zpuino/programmer$ git remote -v
origin  https://github.com/alvieboy/ZPUino-HDL/ (fetch)
origin  https://github.com/alvieboy/ZPUino-HDL/ (push)

dpavlin@blue:/blue-zfs/ZPUino/ZPUino-HDL/zpu/hdl/zpuino/programmer$ autoreconf --install
dpavlin@blue:/blue-zfs/ZPUino/ZPUino-HDL/zpu/hdl/zpuino/programmer$ ./configure
dpavlin@blue:/blue-zfs/ZPUino/ZPUino-HDL/zpu/hdl/zpuino/programmer$ make
dpavlin@blue:/blue-zfs/ZPUino/ZPUino-HDL/zpu/hdl/zpuino/programmer$ cp zpuinoprogrammer /blue-zfs/FPGA/Papilio/ZAP--ZPUino-Arduino-Papilio--IDE/build/linux/dist/tools/
# this one is for already built version
dpavlin@blue:/blue-zfs/ZPUino/ZPUino-HDL/zpu/hdl/zpuino/programmer$ cp zpuinoprogrammer /blue-zfs/FPGA/Papilio/ZAP--ZPUino-Arduino-Papilio--IDE/build/linux/work/hardware/tools/zpu/bin/zpuinoprogrammer

program boot file (IDE doesn't have permission to do so)

dpavlin@blue:/blue-zfs/FPGA/Papilio$ ./papilio-prog -v -f ./zap-2.0.5/hardware/zpuino/zpu/bootloaders/lx9/zpuino-1.0-PapilioPro-S6LX9-RetroCade-1.0.bit
Using built-in device list
JTAG chainpos: 0 Device IDCODE = 0x24001093     Desc: XC6SLX9
Created from NCD file: papilio_pro_routed.ncd;UserID=0xFFFFFFFF
Target device: 6slx9tqg144
Created: 2012/11/20 00:16:43
Bitstream length: 2727072 bits

Uploading "./zap-2.0.5/hardware/zpuino/zpu/bootloaders/lx9/zpuino-1.0-PapilioPro-S6LX9-RetroCade-1.0.bit". DNA is 0x190efd25eb57c9fe
Done.
Programming time 549.2 ms
USB transactions: Write 176 read 8 retries 5

run IDE

dpavlin@blue:/blue-zfs/FPGA/Papilio/ZAP--ZPUino-Arduino-Papilio--IDE/build/linux/work$ ./arduino
Experimental:  JNI_OnLoad called.
Stable Library
=========================================
Native lib Version = RXTX-2.1-7
Java lib Version   = RXTX-2.1-7

verification will fail, so just upload sketch:

dpavlin@blue:/blue-zfs/FPGA/Papilio/Papilio-SOC/zpu/hdl/zpuino/programmer$ ./zpuinoprogrammer -s 1000000 -R -d /dev/ttyUSB1 -b /tmp/build383944339812357036.tmp/Autoscroll.cpp.bin -U
Board: GadgetFactory Papilio Pro LX9 @ 96000000 Hz (0xa4041700)
Upload completed successfully in 0.05 seconds.

zpugcc

dpavlin@blue:/blue-zfs/FPGA/Papilio$ git clone git://repo.or.cz/zpugcc.git
Cloning into 'zpugcc'...
remote: Counting objects: 35519, done.
remote: Compressing objects: 100% (26110/26110), done.
remote: Total 35519 (delta 8445), reused 35519 (delta 8445)
Receiving objects: 100% (35519/35519), 70.18 MiB | 426.00 KiB/s, done.
Resolving deltas: 100% (8445/8445), done.
Checking connectivity... done.
Checking out files: 100% (35311/35311), done.
dpavlin@blue:/blue-zfs/FPGA/Papilio$ cd zpugcc/toolchain
dpavlin@blue:/blue-zfs/FPGA/Papilio/zpugcc/toolchain$ git diff build.sh
diff --git a/toolchain/build.sh b/toolchain/build.sh
index 783beaa..034929c 100644
--- a/toolchain/build.sh
+++ b/toolchain/build.sh
@@ -3,6 +3,9 @@ set -e
 rm -rf build
 mkdir build
 cd build
+mkdir bin
+ln -s /bin/true bin/makeinfo
+export PATH=`pwd`/bin:$PATH
 ../binutils/configure --target=zpu-elf --prefix=`pwd`/../install
 make
 make install
dpavlin@blue:/blue-zfs/FPGA/Papilio/zpugcc/toolchain$ sh -x build.sh

RetroCade MegaWing

http://retrocade.gadgetfactory.net/index.php?n=Main.RetroCadeMegaWing

LCD

Modify Examples/LiqueidCrystal/Autoscroll

// initialize the library with the numbers of the interface pins
LiquidCrystal lcd(26, 24, 23, 22, 21, 20);

void setup() {
  // contrast to GND
  pinMode(46, OUTPUT);
  digitalWrite(46, LOW);
  // RW to ground
  pinMode(25, OUTPUT);
  digitalWrite(25, LOW);

  // set up the LCD's number of columns and rows: 
  lcd.begin(16,2);
}

ZPU (without Arduino IDE)

Xilinx Virtual Cable Daemon

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Proxmark


Cheap(er) China Proxmark

Mifare sniff/crack

http://code.google.com/p/crapto1/

http://www.youtube.com/watch?v=kTvb7tjbSTI
http://www.fuzzysecurity.com/tutorials/rfid/3.html

Proxmark firmware comparison on emulated Mifare 4k

r command note
590   USB HID
  hf mf rdbl 0 A a0a1a2a3a4a5 OK
  hf mf chk 0 A a0a1a2a3a4a5 Can't select card
617   USB HID
  hf mf rdbl 0 A a0a1a2a3a4a5 OK
  hf mf chk 0 A a0a1a2a3a4a5 Can't select card
  hf mf mifare 2 red, needs power cycle
  hf mf nested o 0 a a0a1a2a3a4a5 4 t Can't select card
672   proxendian.h:22:4: error: #error Define BYTE_ORDER
756   USB CCID
  hf mf rdbl 0 A a0a1a2a3a4a5 Auth error
  hf mf chk 0 A a0a1a2a3a4a5 Can't select card
  hf mf mifare red, yellow, red, needs power cycle
  hf mf nested o 0 a a0a1a2a3a4a5 4 t Can't select card
840   latest
  hf mf rdbl 0 A a0a1a2a3a4a5 Can't select card
  hf mf chk 0 A a0a1a2a3a4a5 Can't select card
  hf mf mifare Can't select card
  hf mf nested o 0 a a0a1a2a3a4a5 4 t Can't select card

Usage

proxmark3> hw version
#db# Prox/RFID mark3 RFID instrument                 
#db# bootrom: svn 816 2013-10-11 22:09:42                 
#db# os: svn 816 2013-10-11 22:09:43                 
#db# FPGA image built on 2012/ 1/ 6 at 15:27:56                 
uC: AT91SAM7S256 Rev B          
Embedded Processor: ARM7TDMI          
Nonvolatile Program Memory Size: 256K bytes          
Second Nonvolatile Program Memory Size: None          
Internal SRAM Size: 64K bytes          
Architecture Identifier: AT91SAM7Sxx Series          
Nonvolatile Program Memory Type: Embedded Flash Memory          

proxmark3> hw tune
#db# Measuring antenna characteristics, please wait...                 
#db# Measuring complete, sending report back to host                 
          
# LF antenna:  0.00 V @   125.00 kHz          
# LF antenna:  0.00 V @   134.00 kHz          
# LF optimal:  0.00 V @ 12000.00 kHz          
# HF antenna:  7.28 V @    13.56 MHz          
# Your LF antenna is unusable.          

proxmark3> hf 14a read
ATQA : 02 00          
 UID : ?? ?? ?? ??
 SAK : 38 [1]          
TYPE : Nokia 6212 or 6131 MIFARE CLASSIC 4K          
 ATS : 0d 78 f7 b1 02 4a 43 4f 50 76 32 34 31 27 cc           
       -  TL : length is 13 bytes          
       -  T0 : TA1 is present, TB1 is present, TC1 is present, FSCI is 8          
       - TA1 : different divisors are NOT supported, DR: [2, 4, 8], DS: [2, 4, 8]          
       - TB1 : SFGI = 0, FWI = 8          
       - TC1 : NAD is NOT supported, CID is supported          
       -  HB : 4a 43 4f 50 76 32 34 31           



brute force 26-bit proxcard

firmware version

According to http://wiki.radiowar.org/Proxmark3%E5%9B%BA%E4%BB%B6%E5%88%97%E8%A1%A8
firmwares newer than 617 have problems.

Google translated version

Please do not upgrade your firmware to the CDC Proxmark3 version r617 ~ r830 driver's! We found that because the problem will lead to Proxmark3 code appears unable to identify high-frequency card, and 816 will appear after Nested number of keys for 000000000000.

flashing update

dpavlin@blue:/blue-zfs/FPGA/proxmark/proxmark3$ make flash-all


Compile new version of firmware

All instructions below this are for old version of software see http://www.proxmark.org/forum/viewtopic.php?id=1668

http://code.google.com/p/proxmark3/wiki/Compiling je strgan http://www.proxmark.org/forum/post/3244/#p3244

sudo apt-get install build-essential libreadline5 libreadline-dev libusb-0.1-4 libusb-dev libqt4-dev perl pkg-config

dpavlin@t61p:/tank/proxmark3$ svn co http://proxmark3.googlecode.com/svn/trunk proxmark3

Boot loader

dpavlin@t61p:/tank/proxmark3/proxmark3$ ./client/flasher -b ./bootrom/obj/bootrom.elf 
Loading ELF file './bootrom/obj/bootrom.elf'...
Loading usable ELF segments:
0: V 0x00100000 P 0x00100000 (0x00000200->0x00000200) [R X] @0x94
1: V 0x00200000 P 0x00100200 (0x000017a8->0x000017a8) [R X] @0x294

Waiting for Proxmark to appear on USB...
Connected units:
        1. SN: ? [004/013]
 Found.
Entering bootloader...
(Press and release the button only to abort)
Waiting for Proxmark to reappear on USB....
Connected units:
        1. SN: ? [004/014]
 Found.

Flashing...
Writing segments for file: ./bootrom/obj/bootrom.elf
 0x00100000..0x001001ff [0x200 / 2 blocks].. OK
 0x00100200..0x001019a7 [0x17a8 / 24 blocks]........................ OK

Resetting hardware...
All done.

Have a nice day!

^
dpavlin@t61p:/tank/proxmark3/proxmark3$ ./client/flasher ./armsrc/obj/fullimage.elf 
Loading ELF file './armsrc/obj/fullimage.elf'...
Loading usable ELF segments:
0: V 0x00102000 P 0x00102000 (0x0000a4bc->0x0000a4bc) [R  ] @0xb4
1: V 0x00110000 P 0x00110000 (0x0000ba8c->0x0000ba8c) [R X] @0xa570
2: V 0x00200000 P 0x0011ba8c (0x00000004->0x00000004) [RW ] @0x15ffc
Note: Extending previous segment from 0xba8c to 0xba90 bytes

Waiting for Proxmark to appear on USB...
Connected units:
        1. SN: ? [004/015]
 Found.
Entering bootloader...
(Press and release the button only to abort)
Waiting for Proxmark to reappear on USB....
Connected units:
        1. SN: ChangeMe [004/016]
 Found.

Flashing...
Writing segments for file: ./armsrc/obj/fullimage.elf
 0x00102000..0x0010c4bb [0xa4bc / 165 blocks]..................................................................................................................................................................... OK
 0x00110000..0x0011ba8f [0xba90 / 187 blocks]........................................................................................................................................................................................... OK

Resetting hardware...
All done.

Have a nice day!
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Mojo

dmesg

[  894.003473] usb 1-3.1: new full-speed USB device number 5 using xhci_hcd
[  894.022883] usb 1-3.1: New USB device found, idVendor=03eb, idProduct=2144
[  894.022888] usb 1-3.1: New USB device strings: Mfr=1, Product=2, SerialNumber=220
[  894.022891] usb 1-3.1: Product: Mojo V2
[  894.022893] usb 1-3.1: Manufacturer: Emb Micro
[  894.022896] usb 1-3.1: SerialNumber: 84134353230351B0D1B0
[  894.023034] usb 1-3.1: ep 0x82 - rounding interval to 1024 microframes, ep desc says 2040 microframes
[  894.039841] cdc_acm 1-3.1:1.0: ttyACM0: USB ACM device
[  894.040196] usbcore: registered new interface driver cdc_acm
[  894.040200] cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters

mojo-loader

http://embeddedmicro.com/tutorials/the-mojo/installing-mojo-loader

remove RXTXcomm from distribution and use one from packages

dpavlin@blue:/blue-zfs/FPGA/Mojo/mojo-loader-1.1.2/lib$ rm RXTXcomm.jar 
dpavlin@blue:/blue-zfs/FPGA/Mojo/mojo-loader-1.1.2/lib$ rm librxtxSerial.so
dpavlin@blue:/blue-zfs/FPGA/Mojo/mojo-loader-1.1.2/lib$ ln -s /usr/share/java/RXTXcomm.jar 
dpavlin@blue:/blue-zfs/FPGA/Mojo/mojo-loader-1.1.2/lib$ ln -s /usr/lib/jni/librxtxSerial.so

alternative implementation: https://github.com/mogorman/mojo.py

Bitcoin mining

https://github.com/kramble/DE0-Nano-BitCoin-Miner/tree/master/Mojo_LX9

http://embeddedmicro.com/forum/viewtopic.php?f=3&t=68&sid=8510da058a2db897f380609cfcee4044&start=10#p300

dpavlin@blue:/blue-zfs/FPGA/Mojo$ git clone https://github.com/kramble/DE0-Nano-BitCoin-Miner.git
Cloning into 'DE0-Nano-BitCoin-Miner'...
remote: Counting objects: 227, done.
remote: Compressing objects: 100% (167/167), done.
remote: Total 227 (delta 74), reused 208 (delta 56)
Receiving objects: 100% (227/227), 659.22 KiB | 174.00 KiB/s, done.
Resolving deltas: 100% (74/74), done.

upload bitstream

dpavlin@blue:/blue-zfs/FPGA/Mojo/DE0-Nano-BitCoin-Miner/Mojo_LX9/MiningSoftware$ ../../../mojo.py/mojo.py -v -d /dev/ttyACM1 -i ../Bitstream/mojo_top_hashers6_100MHz_icarus.bin 
Rebooting Mojo
Mojo is ready to recieve bitstream
Mojo acknowledged size of bitstream. Writing bitstream
Mojo has been flashed
Verifying Mojo
First Byte was valid getting flash size.
Flash and local bitstream match file size.
Flash and local bitstream are a match.
Mojo has been loaded bitsream

dpavlin@blue:/blue-zfs/FPGA/Mojo/DE0-Nano-BitCoin-Miner/Mojo_LX9$ python miner_icarus.py 
Miner started on Tue Jul 16 23:26:17 2013
Sending data to FPGA

...

Share found on Tue Jun 25 23:37:11 2013 nonce 0074fd13
Upstream result: True
[15 accepted, 0 failed, 5.25 +/- 1.35 Mhash/s]
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Spartan 3A

ISE IMPACT

USB driver

http://rmdir.de/~michael/xilinx/

dpavlin@blue:/blue-zfs/FPGA/S3A$ git clone git://git.zerfleddert.de/usb-driver
dpavlin@blue:/blue-zfs/FPGA/S3A$ cd usb-driver/
dpavlin@blue:/blue-zfs/FPGA/S3A/usb-driver$ make
cc -Wall -fPIC -DUSB_DRIVER_VERSION="\"2013-06-18 23:37:15\""  -DJTAGKEY usb-driver.c xpcu.c parport.c config.c jtagmon.c jtagkey.c -o libusb-driver.so -ldl -lusb -lpthread -L/usr/lib/x86_64-linux-gnu -lftdi -lusb -shared
parport.c: In function ‘parport_transfer’:
parport.c:21:23: warning: variable ‘last_pp_write’ set but not used [-Wunused-but-set-variable]
  static unsigned char last_pp_write = 0;
                       ^
cc -DDEBUG -Wall -fPIC -DUSB_DRIVER_VERSION="\"2013-06-18 23:37:15\""  -DJTAGKEY usb-driver.c xpcu.c parport.c config.c jtagmon.c jtagkey.c -o libusb-driver-DEBUG.so -ldl -lusb -lpthread -L/usr/lib/x86_64-linux-gnu -lftdi -lusb -shared
Built library is 64 bit. Run `make lib32' to build a 32 bit version
dpavlin@blue:/blue-zfs/FPGA/S3A/usb-driver$ ./setup_pcusb /blue-zfs/Xilinx/14.5/ISE_DS/ISE/
You are not root, trying sudo...
Looking for USB cable files: /blue-zfs/Xilinx/14.5/ISE_DS/ISE//bin/lin64
Copying firmware to /usr/share:
‘/blue-zfs/Xilinx/14.5/ISE_DS/ISE//bin/lin64/xusbdfwu.hex’ -> ‘/usr/share/xusbdfwu.hex’
‘/blue-zfs/Xilinx/14.5/ISE_DS/ISE//bin/lin64/xusb_emb.hex’ -> ‘/usr/share/xusb_emb.hex’
‘/blue-zfs/Xilinx/14.5/ISE_DS/ISE//bin/lin64/xusb_xlp.hex’ -> ‘/usr/share/xusb_xlp.hex’
‘/blue-zfs/Xilinx/14.5/ISE_DS/ISE//bin/lin64/xusb_xp2.hex’ -> ‘/usr/share/xusb_xp2.hex’
‘/blue-zfs/Xilinx/14.5/ISE_DS/ISE//bin/lin64/xusb_xpr.hex’ -> ‘/usr/share/xusb_xpr.hex’
‘/blue-zfs/Xilinx/14.5/ISE_DS/ISE//bin/lin64/xusb_xse.hex’ -> ‘/usr/share/xusb_xse.hex’
‘/blue-zfs/Xilinx/14.5/ISE_DS/ISE//bin/lin64/xusb_xup.hex’ -> ‘/usr/share/xusb_xup.hex’
Installing udev rules:
done

# install fxload
sudo apt-get install fxload

boundary scan

GUI --- Auto connect to cable...
INFO:iMPACT - Connecting to TCF agent...
AutoDetecting cable. Please wait.
*** WARNING ***: When port is set to auto detect mode, cable speed is set to default 6 MHz regardless of explicit arguments supplied for setting the baud rates
PROGRESS_START - Starting Operation.
 Using windrvr6 driver.
Connecting to cable (Usb Port - USB21).
Checking cable driver.
File version of /blue-zfs/Xilinx/14.5/ISE_DS/ISE/bin/lin64/xusbdfwu.hex = 1030.
File version of /usr/share/xusbdfwu.hex = 1030.
 libusb-driver.so version: 2013-06-18 23:37:15.
 Cable PID = 0008.
 Max current requested during enumeration is 74 mA.
Type = 0x0004.
 Cable Type = 3, Revision = 0.
 Setting cable speed to 6 MHz.
Cable connection established.
Firmware version = 1303.
File version of /blue-zfs/Xilinx/14.5/ISE_DS/ISE/data/xusb_xlp.hex = 1303.
Firmware hex file version = 1303.
PLD file version = 0012h.
 PLD version = 0012h.
PROGRESS_END - End Operation.
Elapsed time =      0 sec.
Type = 0x0004.
 ESN device is not available for this cable.
Attempting to identify devices in the boundary-scan chain configuration...
INFO:iMPACT - Current time: 6/22/13 4:27 PM
PROGRESS_START - Starting Operation.
Identifying chain contents...'0': : Manufacturer's ID = Xilinx xcf04s, Version : 15
INFO:iMPACT:1777 - 
Reading /blue-zfs/Xilinx/14.5/ISE_DS/ISE/xcf/data/xcf04s.bsd...
INFO:iMPACT:501 - '1': Added Device xcf04s successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
'1': : Manufacturer's ID = Xilinx xc3s700a, Version : 2
INFO:iMPACT:1777 - 
Reading /blue-zfs/Xilinx/14.5/ISE_DS/ISE/spartan3a/data/xc3s700a.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s700a successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
done.
PROGRESS_END - End Operation.
Elapsed time =      0 sec.
Attempting to identify devices in the boundary-scan chain configuration...
INFO:iMPACT - Current time: 6/22/13 5:44 PM
PROGRESS_START - Starting Operation.
----------------------------------------------------------------------
----------------------------------------------------------------------
Identifying chain contents...'0': : Manufacturer's ID = Xilinx xcf04s, Version : 15
INFO:iMPACT:1777 - 
Reading /blue-zfs/Xilinx/14.5/ISE_DS/ISE/xcf/data/xcf04s.bsd...
INFO:iMPACT:501 - '1': Added Device xcf04s successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
'1': : Manufacturer's ID = Xilinx xc3s700a, Version : 2
INFO:iMPACT:1777 - 
Reading /blue-zfs/Xilinx/14.5/ISE_DS/ISE/spartan3a/data/xc3s700a.bsd...
INFO:iMPACT:501 - '1': Added Device xc3s700a successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
done.
PROGRESS_END - End Operation.
Elapsed time =      0 sec.
'1': Loading file '/blue-zfs/FPGA/S3A/Open-Source-FPGA-Bitcoin-Miner/projects/Verilog_Xilinx_Port/S3A/top/fpgaminer_top.bit' ...
done.
INFO:iMPACT:2257 - Startup Clock has been changed to 'JtagClk' in the bitstream stored in memory,
but the original bitstream file remains unchanged.
UserID read from the bitstream file = 0xFFFFFFFF.
----------------------------------------------------------------------
INFO:iMPACT:501 - '1': Added Device xc3s700a successfully.
----------------------------------------------------------------------

Get Device ID

INFO:iMPACT - Current time: 6/22/13 5:45 PM
Maximum TCK operating frequency for this device chain: 10000000.
Validating chain...
Boundary-scan chain validated successfully.
'1': IDCODE is '00100010001000101000000010010011'
'1': IDCODE is '22228093' (in hex).
'1': : Manufacturer's ID = Xilinx xc3s700a, Version : 2

get device status

INFO:iMPACT - Current time: 6/22/13 5:48 PM
Maximum TCK operating frequency for this device chain: 10000000.
Validating chain...
Boundary-scan chain validated successfully.
'1': Reading status register contents...
CRC error                                                                  :         0
IDCODE not validated while writing FDRI                                    :         0
DCM Locked                                                                 :         1
status of GTS_CFG_B                                                        :         1
status of GWE                                                              :         1
status of GHIGH                                                            :         1
value of VSEL pin 0                                                        :         1
value of VSEL pin 1                                                        :         1
value of VSEL pin 2                                                        :         1
value of MODE pin M0                                                       :         1
value of MODE pin M1                                                       :         0
value of MODE pin M2                                                       :         0
value of CFG_RDY (INIT_B)                                                  :         1
DONEIN input from Done Pin                                                 :         1
SYNC word not found                                                        :         0

Get Device Signature/Usercode

INFO:iMPACT - Current time: 6/22/13 5:50 PM
Maximum TCK operating frequency for this device chain: 10000000.
Validating chain...
Boundary-scan chain validated successfully.
'1': Usercode is 'ffffffff'

program

Load FPGA bitstream, don't update flash

INFO:iMPACT - Current time: 6/22/13 5:51 PM
PROGRESS_START - Starting Operation.
Maximum TCK operating frequency for this device chain: 10000000.
Validating chain...
Boundary-scan chain validated successfully.
'1': Programming device...
 LCK_cycle = NoWait.
LCK cycle: NoWait
done.
'1': Reading status register contents...
CRC error                                                                  :         0
IDCODE not validated while writing FDRI                                    :         0
DCM Locked                                                                 :         1
status of GTS_CFG_B                                                        :         1
status of GWE                                                              :         1
status of GHIGH                                                            :         1
value of VSEL pin 0                                                        :         1
value of VSEL pin 1                                                        :         1
value of VSEL pin 2                                                        :         1
value of MODE pin M0                                                       :         1
value of MODE pin M1                                                       :         0
value of MODE pin M2                                                       :         0
value of CFG_RDY (INIT_B)                                                  :         1
DONEIN input from Done Pin                                                 :         1
SYNC word not found                                                        :         0
INFO:iMPACT:2219 - Status register values:
INFO:iMPACT - 0011 1111 1100 1100 
INFO:iMPACT:579 - '1': Completed downloading bit file to device.
INFO:iMPACT:188 - '1': Programming completed successfully.
 LCK_cycle = NoWait.
LCK cycle: NoWait
INFO:iMPACT - '1': Checking done pin....done.
'1': Programmed successfully.
PROGRESS_END - End Operation.
Elapsed time =      1 sec.

FPGA bitcoin mining

http://github.com/sfo/Open-Source-FPGA-Bitcoin-Miner

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