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Dobrica Pavlinušić's random unstructured stuff
ULX3S: Revision 12
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^ first steps Here I will try to document correct order to read documentation to get setup for ULX3S: https://github.com/emard/ulx3s-bin/blob/master/README.md ^^ udev rule ^^ ujprog .pre git clone https://github.com/f32c/tools f32c-tools cd f32c-tools/ujprog/ dpavlin@x200:/mnt/nuc/FPGA/f32c-tools/ujprog$ rm ujprog dpavlin@x200:/mnt/nuc/FPGA/f32c-tools/ujprog$ make -f Makefile.linux cc -Wall -D__linux__ -std=gnu99 -static ujprog.c /usr/lib/x86_64-linux-gnu/libftdi.a /usr/lib/x86_64-linux-gnu/libusb.a -o ujprog dpavlin@x200:/mnt/nuc/FPGA/f32c-tools/ujprog$ sudo cp ujprog /usr/local/bin/ .pre * create udev rule ^^ passthru to access esp32 .pre dpavlin@x200:/mnt/nuc/FPGA/ulx3s-bin/fpga/passthru/passthru-v20-85f$ ujprog -j flash ulx3s_85f_passthru.bit ULX2S / ULX3S JTAG programmer v 3.0.92 (built Nov 19 2019 10:55:50) Using USB cable: ULX3S FPGA 12K v3.0.3 [Wed Nov 20 18:02:01 2019] ftdi_sio ttyUSB0: FTDI USB Serial Device converter now disconnected from ttyUSB0 [Wed Nov 20 18:02:01 2019] ftdi_sio 1-5.2:1.0: device disconnected Programming: 100% Completed in 24.36 seconds. [Wed Nov 20 18:02:25 2019] usb 1-5.2: reset full-speed USB device number 56 using ehci-pci [Wed Nov 20 18:02:26 2019] ftdi_sio 1-5.2:1.0: FTDI USB Serial Device converter detected [Wed Nov 20 18:02:26 2019] usb 1-5.2: Detected FT-X [Wed Nov 20 18:02:26 2019] usb 1-5.2: FTDI USB Serial Device converter now attached to ttyUSB0 .pre ^^ update size of your FPGA .pre dpavlin@x200:/mnt/nuc/FPGA/ulx3s-bin$ usb-jtag/linux-amd64/ftx_prog --product "ULX3S FPGA 85K v3.0.3" .pre power cycle board to get new usb id, test that it's supported by ujprog .pre dpavlin@x200:/mnt/nuc/FPGA/ulx3s-bin$ ujprog -r .pre ^^ esptool and esp32 booting problems You should be using ecptool from ulx3s-bin repository to quite @emard from https://gitter.im/ulx3s/Lobby#dark-theme > OK then. If you have issues with ESP32 not booting with SD card but booting without SD card then then the fuse burn script from ulx3s-bin should be run. So far so good, you erased its flash, try linux. If no issue then can try to flash micropython and my new ESP32 OTA programmer ecp5.py end uftpd.py > I have wisely taken some esptool.py which works and frozen it in ulx3s, versions change all the time and maybe you took something in the middle of development action :) ^^ install micropython https://github.com/emard/esp32ecp5/ .pre dpavlin@nuc:/nuc/FPGA$ git clone https://github.com/emard/esp32ecp5/ dpavlin@nuc:/nuc/FPGA$ cd esp32ecp5/ dpavlin@x200:/mnt/nuc/FPGA/esp32ecp5$ wget https://micropython.org/resources/firmware/esp32-idf3-20191120-v1.11-580-g973f68780.bin .pre It's important to erase flash or micropyhton will complain about corrupt fat filesystem like: FAT filesystem appears to be corrupted. If you had important data there, you may want to make a flash snapshot to try to recover it. Otherwise, perform factory reprogramming of MicroPython firmware (completely erase flash, followed by firmware programming). .pre dpavlin@x200:/mnt/nuc/FPGA/esp32ecp5$ ../ulx3s-bin/esp32/serial-uploader/esptool.py --chip esp32 --port /dev/ttyUSB0 erase_flash esptool.py v2.6-beta1 Serial port /dev/ttyUSB0 Connecting.... Chip is ESP32D0WDQ6 (revision 1) Features: WiFi, BT, Dual Core, 240MHz, VRef calibration in efuse, Coding Scheme None MAC: a4:cf:12:55:c5:60 Uploading stub... Running stub... Stub running... Erasing flash (this may take a while)... Chip erase completed successfully in 8.7s Hard resetting via RTS pin... dpavlin@x200:/mnt/nuc/FPGA/esp32ecp5$ ../ulx3s-bin/esp32/serial-uploader/esptool.py --chip esp32 --port /dev/ttyUSB0 --baud 460800 write_flash -z 0x1000 esp32-idf3-20191120-v1.11-580-g973f68780.bin esptool.py v2.6-beta1 Serial port /dev/ttyUSB0 Connecting.... Chip is ESP32D0WDQ6 (revision 1) Features: WiFi, BT, Dual Core, 240MHz, VRef calibration in efuse, Coding Scheme None MAC: a4:cf:12:55:c5:60 Uploading stub... Running stub... Stub running... Changing baud rate to 460800 Changed. Configuring flash size... Auto-detected Flash size: 4MB Compressed 1240192 bytes to 783187... Wrote 1240192 bytes (783187 compressed) at 0x00001000 in 18.7 seconds (effective 529.3 kbit/s)... Hash of data verified. Leaving... Hard resetting via RTS pin... dpavlin@x200:/mnt/nuc/FPGA/esp32ecp5$ microcom -p /dev/ttyUSB0 connected to /dev/ttyUSB0 Escape character: Ctrl-\ Type the escape character to get to the prompt. >>> > help() Welcome to MicroPython on the ESP32! For generic online docs please visit http://docs.micropython.org/ For access to the hardware use the 'machine' module: import machine pin12 = machine.Pin(12, machine.Pin.OUT) pin12.value(1) pin13 = machine.Pin(13, machine.Pin.IN, machine.Pin.PULL_UP) print(pin13.value()) i2c = machine.I2C(scl=machine.Pin(21), sda=machine.Pin(22)) i2c.scan() i2c.writeto(addr, b'1234') i2c.readfrom(addr, 4) Basic WiFi configuration: import network sta_if = network.WLAN(network.STA_IF); sta_if.active(True) sta_if.scan() # Scan for available access points sta_if.connect("<AP_name>", "<password>") # Connect to an AP sta_if.isconnected() # Check for successful connection Control commands: CTRL-A -- on a blank line, enter raw REPL mode CTRL-B -- on a blank line, enter normal REPL mode CTRL-C -- interrupt a running program CTRL-D -- on a blank line, do a soft reset of the board CTRL-E -- on a blank line, enter paste mode For further help on a specific object, type help(obj) For a list of available modules, type help('modules') .pre ^^ webrepl .pre dpavlin@klin:/klin/FPGA$ git clone https://github.com/hyperglitch/webrepl .pre You can send files from command-line: .pre dpavlin@x200:/mnt/nuc/FPGA/webrepl$ ./webrepl_cli.py -p ulx3s ../esp32ecp5/ecp5.py 192.168.3.130:/ op:put, host:192.168.3.130, port:8266, passwd:ulx3s. ../esp32ecp5/ecp5.py -> /ecp5.py Remote WebREPL version: (1, 11, 0) Sent 22777 of 22777 bytes dpavlin@x200:/mnt/nuc/FPGA/webrepl$ ./webrepl_cli.py -p ulx3s ../esp32ecp5/uftpd.py 192.168.3.130:/ op:put, host:192.168.3.130, port:8266, passwd:ulx3s. ../esp32ecp5/uftpd.py -> /uftpd.py Remote WebREPL version: (1, 11, 0) Sent 19482 of 19482 bytes .pre ^ open source toolchain *this is old and needs update* * https://github.com/SymbiFlow/prjtrellis .pre dpavlin@klin:/klin/FPGA$ git clone https://github.com/SymbiFlow/prjtrellis dpavlin@klin:/klin/FPGA/prjtrellis$ ./download-latest-db.sh dpavlin@klin:/klin/FPGA/prjtrellis$ cd libtrellis/ dpavlin@klin:/klin/FPGA/prjtrellis/libtrellis$ sudo apt-get install libpython3-dev libboost-python-dev libboost-filesystem-dev libboost-thread-dev libboost-program-options-dev dpavlin@klin:/klin/FPGA/prjtrellis/libtrellis$ cmake -DCMAKE_INSTALL_PREFIX=/usr/local . dpavlin@klin:/klin/FPGA/prjtrellis/libtrellis$ make .pre ^ diamond https://github.com/jandob/lattice-diamond-archlinux/blob/master/eth0DummyToggle ^ saxxonsoc ^^ linux https://gitter.im/ulx3s/Lobby?at=5de8ba2f08d0c961b7f3a25f .pre git clone https://github.com/SpinalHDL/buildroot.git -b saxon buildroot git clone https://github.com/SpinalHDL/linux.git -b vexriscv --depth 1 linux cd buildroot cp board/spinal/saxon_default/linux_nonet.config board/spinal/saxon_default/linux.config # Add extra options to board/spinal/saxon_default/linux.config make spinal_saxon_default_defconfig make linux-rebuild all -j$(nproc) output/host/bin/riscv32-linux-objcopy -O binary output/images/vmlinux output/images/Image # Make sure Image is at least 116KB less than 4MB .pre ^ NES https://gitter.im/ulx3s/Lobby?at=5de033f49319bb5190a9c3b6 * https://github.com/ironsteel/nes_ecp5 * flash arbitrary data to flash: https://github.com/ironsteel/tools/commit/cb0c43b6681a52f1cc19b6b70ddd587a307da90c#diff-3b94c2a26ac88b4b2363e058acf1852fR2281 |