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<title><![CDATA[Dobrica Pavlinušić's random unstructured stuff: Colorlight 5A-75B]]></title>
<link>https://saturn.ffzg.hr/rot13/index.cgi?colorlight_5a_75b</link>
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<pubDate>Wed, 30 Sep 2020 11:01:57 -0000</pubDate>
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<title><![CDATA[Colorlight 5A-75B]]></title>
<link>https://saturn.ffzg.hr/rot13/index.cgi?colorlight_5a_75b</link>
<description><![CDATA[<div>Creator: Dobrica Pavlinušić</div><hr/><div>Tags: FPGA</div><hr/><div class="wiki">
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                Contents: [Dobrica Pavlinušić's random unstructured stuff]
              
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<li><span class="nlw_phrase"><a title="section link" href="https://saturn.ffzg.hr/rot13/index.cgi?dobrica_pavlinu%C5%A1i%C4%87_s_random_unstructured_stuff#links">Dobrica Pavlinušić's random unstructured stuff (links)</a><!-- wiki: {link: [Dobrica Pavlinušić's random unstructured stuff] links} --></span></li>

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<li><span class="nlw_phrase"><a title="section link" href="https://saturn.ffzg.hr/rot13/index.cgi?dobrica_pavlinu%C5%A1i%C4%87_s_random_unstructured_stuff#chubby75">Dobrica Pavlinušić's random unstructured stuff (chubby75)</a><!-- wiki: {link: [Dobrica Pavlinušić's random unstructured stuff] chubby75} --></span></li>
<li><span class="nlw_phrase"><a title="section link" href="https://saturn.ffzg.hr/rot13/index.cgi?dobrica_pavlinu%C5%A1i%C4%87_s_random_unstructured_stuff#original_protocol">Dobrica Pavlinušić's random unstructured stuff (original protocol)</a><!-- wiki: {link: [Dobrica Pavlinušić's random unstructured stuff] original protocol} --></span></li>
<li><span class="nlw_phrase"><a title="section link" href="https://saturn.ffzg.hr/rot13/index.cgi?dobrica_pavlinu%C5%A1i%C4%87_s_random_unstructured_stuff#replace_level_shifters_to_get_input">Dobrica Pavlinušić's random unstructured stuff (replace level shifters to get input)</a><!-- wiki: {link: [Dobrica Pavlinušić's random unstructured stuff] replace level shifters to get input} --></span></li>
<li><span class="nlw_phrase"><a title="section link" href="https://saturn.ffzg.hr/rot13/index.cgi?dobrica_pavlinu%C5%A1i%C4%87_s_random_unstructured_stuff#chiselwatt">Dobrica Pavlinušić's random unstructured stuff (chiselwatt)</a><!-- wiki: {link: [Dobrica Pavlinušić's random unstructured stuff] chiselwatt} --></span></li>
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<li><span class="nlw_phrase"><a title="section link" href="https://saturn.ffzg.hr/rot13/index.cgi?dobrica_pavlinu%C5%A1i%C4%87_s_random_unstructured_stuff#litex">Dobrica Pavlinušić's random unstructured stuff (litex)</a><!-- wiki: {link: [Dobrica Pavlinušić's random unstructured stuff] litex} --></span></li>
<li><span class="nlw_phrase"><a title="section link" href="https://saturn.ffzg.hr/rot13/index.cgi?dobrica_pavlinu%C5%A1i%C4%87_s_random_unstructured_stuff#fpga_pin_mapping">Dobrica Pavlinušić's random unstructured stuff (fpga pin mapping)</a><!-- wiki: {link: [Dobrica Pavlinušić's random unstructured stuff] fpga pin mapping} --></span></li>
<li><span class="nlw_phrase"><a title="section link" href="https://saturn.ffzg.hr/rot13/index.cgi?dobrica_pavlinu%C5%A1i%C4%87_s_random_unstructured_stuff#fpga_images">Dobrica Pavlinušić's random unstructured stuff (fpga images)</a><!-- wiki: {link: [Dobrica Pavlinušić's random unstructured stuff] fpga images} --></span></li>
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Board version: v7.0</p>
<ul>
<li>Lattice ECP5 <tt>LFE5U-25F-6BG256C</tt> (<a target="_blank" title="(external link)" href="https://www.latticesemi.com/Products/FPGAandCPLD/ECP5">product page<!-- wiki-renamed-hyperlink "product page"<https://www.latticesemi.com/Products/FPGAandCPLD/ECP5> --></a>)</li>
<li>Winbond <tt>25Q32JVSIQ</tt>, 32 Mbits SPI flash (<a target="_blank" title="(external link)" href="https://github.com/q3k/chubby75/blob/master/5a-75b/datasheets/w25q32jv_spi_revc_08302016.pdf">datasheet<!-- wiki-renamed-hyperlink "datasheet"<https://github.com/q3k/chubby75/blob/master/5a=-75b/datasheets/w25q32jv_spi_revc_08302016.pdf> --></a>)</li>
<li>2x Broadcom <tt>B50612D</tt> Gigabit Ethernet PHYs (<a target="_blank" title="(external link)" href="https://github.com/q3k/chubby75/blob/master/5a-75b/datasheets/B50610-DS07-RDS.pdf">datasheet<!-- wiki-renamed-hyperlink "datasheet"<https://github.com/q3k/chubby75/blob/master/5a=-75b/datasheets/B50610=-DS07=-RDS.pdf> --></a>)</li>
<li>2x ESMT <tt>M12L16161A-5T</tt> 1M x 16bit 200MHz SDRAMs (organized as 1M x 32bit) (<a target="_blank" title="(external link)" href="https://github.com/q3k/chubby75/blob/master/5a-75b/datasheets/M12L16161A.pdf">datasheet<!-- wiki-renamed-hyperlink "datasheet"<https://github.com/q3k/chubby75/blob/master/5a=-75b/datasheets/M12L16161A.pdf> --></a>)</li>
<li>12x <tt>74HC245T</tt> Octal Bidirectional Transceiver (used for level translation to 5V)</li>
</ul>
<span class="nlw_phrase"><img alt="cl-5a-75b-v70-front-800.jpg" src="https://saturn.ffzg.hr/rot13/index.cgi/cl-5a-75b-v70-front-800.jpg?action=attachments_download;page_name=colorlight_5a_75b;id=20200218155036-4-19247" /><!-- wiki: {image: cl-=5a-=75b-=v70-=front-=800.jpg} --></span><br /><br /><h1 id="links">links</h1>
<ul>
<li><a target="_blank" title="(external link)" href="https://hackaday.com/2020/01/24/new-part-day-led-driver-is-fpga-dev-board-in-disguise/">https://hackaday.com/2020/01/24/new-part-day-led-driver-is-fpga-dev-board-in-disguise/</a></li>
</ul>
<h2 id="chubby75">chubby75</h2>
<ul>
<li><a target="_blank" title="(external link)" href="https://github.com/q3k/chubby75/tree/master/5a-75b">https://github.com/q3k/chubby75/tree/master/5a-75b</a></li>

<ul>
<li>upstream: <a target="_blank" title="(external link)" href="https://github.com/tomverbeure/chubby75/tree/5a-75b/5a-75b">https://github.com/tomverbeure/chubby75/tree/5a-75b/5a-75b</a></li>
<li>upstream for v7 board: <a target="_blank" title="(external link)" href="https://github.com/miek/chubby75/blob/5a-75b-v7_pinout/5a-75b/hardware_V7.0.md">https://github.com/miek/chubby75/blob/5a-75b-v7_pinout/5a-75b/hardware_V7.0.md</a></li>
</ul></ul>
<h2 id="original_protocol">original protocol</h2>
<ul>
<li>send data to original fpga image: <a target="_blank" title="(external link)" href="https://github.com/FalconChristmas/fpp/blob/master/src/channeloutput/ColorLight-5a-75.cpp">https://github.com/FalconChristmas/fpp/blob/master/src/channeloutput/ColorLight-5a-75.cpp</a></li>
</ul>
<h2 id="replace_level_shifters_to_get_input">replace level shifters to get input</h2>
<ul>
<li><a target="_blank" title="(external link)" href="https://twitter.com/edu_arana/status/1231466891354525698">https://twitter.com/edu_arana/status/1231466891354525698</a></li>
</ul>
<p>
<a target="_blank" title="(external link)" href="https://twitter.com/Claude1079/status/1231194849350647808">https://twitter.com/Claude1079/status/1231194849350647808</a></p>
<p>
&nbsp;SN74CBT3245APW 8bit bidirectional FET switches<br />
QS3245QG</p>
<span class="nlw_phrase"><img alt="colorLight5A-75b.jpg" src="https://saturn.ffzg.hr/rot13/index.cgi/colorLight5A-75b.jpg?action=attachments_download;page_name=colorlight_5a_75b;id=20200223103108-0-7620" /><!-- wiki: {image: colorLight5A-=75b.jpg} --></span><br /><br /><h2 id="chiselwatt">chiselwatt</h2>
<p>
<a target="_blank" title="(external link)" href="https://github.com/antonblanchard/chiselwatt/commit/5a7fcbc8142ed2b390e1f8bfaaa801fe09a60351">https://github.com/antonblanchard/chiselwatt/commit/5a7fcbc8142ed2b390e1f8bfaaa801fe09a60351</a></p>
<p>
UART RX is on J19, labelled key+ on the silk screen on the back<br />
UART TX is on J1, pin 1.</p>
<p>
LOCATE COMP &quot;clock&quot; SITE &quot;P6&quot;;</p>
<p>
LOCATE COMP &quot;io_tx&quot; SITE &quot;F3&quot;;<br />
LOCATE COMP &quot;io_rx&quot; SITE &quot;M13&quot;;</p>
<h1 id="litex">litex</h1>
<p>
basic example of litex on colorLight 5A-75B based on fpga_101/lab004</p>
<ul>
<li><a target="_blank" title="(external link)" href="https://github.com/trabucayre/litexOnColorlightLab004/">https://github.com/trabucayre/litexOnColorlightLab004/</a></li>
<li><a target="_blank" title="(external link)" href="https://github.com/NiklasFauth/colorlight-led-cube">https://github.com/NiklasFauth/colorlight-led-cube</a></li>
<li><a target="_blank" title="(external link)" href="https://github.com/ghent360/riscvOnColorlight-5A-75B">https://github.com/ghent360/riscvOnColorlight-5A-75B</a></li>
</ul>
<h1 id="fpga_pin_mapping">fpga pin mapping</h1>
<p>
<a target="_blank" title="(external link)" href="https://twitter.com/adamgreig/status/1297255957320421383">https://twitter.com/adamgreig/status/1297255957320421383</a></p>
<p>
I don't want to load a new image onto this totally blind, so I used the prjtrellis tools (<a target="_blank" title="(external link)" href="https://github.com/YosysHQ/prjtrellis/">https://github.com/YosysHQ/prjtrellis/</a>) to write a script (<a target="_blank" title="(external link)" href="https://github.com/adamgreig/cl/blob/master/pins.py">https://github.com/adamgreig/cl/blob/master/pins.py</a>) which works out input/output/bidi for all pins used in any ECP5 bitstream. It found only one unused pin...</p>
<p>
<a target="_blank" title="(external link)" href="https://github.com/adamgreig/cl/blob/master/pins.py">https://github.com/adamgreig/cl/blob/master/pins.py</a></p>
<h1 id="fpga_images">fpga images</h1>
<ul>
<li><a target="_blank" title="(external link)" href="https://github.com/suglover/5a-75x-images">https://github.com/suglover/5a-75x-images</a></li>
<li>ecpprog (FTDI jtag probe): <a target="_blank" title="(external link)" href="https://github.com/gregdavill/ecpprog">https://github.com/gregdavill/ecpprog</a></li>
</ul>
</div>
<hr/><div>Attachments: cl-5a-75b-v70-front-800.jpg, colorLight5A-75b.jpg</div>]]></description>
<author>Dobrica Pavlinu&#x161;i&#x107;</author>
<category>FPGA</category>
<guid isPermaLink="true">https://saturn.ffzg.hr/rot13/index.cgi?colorlight_5a_75b</guid>
<pubDate>Wed, 30 Sep 2020 11:01:57 -0000</pubDate>
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